View 17533_1035572.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

document number: mpc17533 rev. 3.0, 7/2006 freescale semiconductor advance information * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2006. all rights reserved. 0.7 a 6.8 v dual h-bridge motor driver the 17533 is a monolithic dual h-bridge power ic ideal for portable electronic applications containing bi polar stepper motors and/or brush dc-motors (e.g., cameras and disk drive head positioners). the 17533 operates from 2.0 v to 6. 8 v, with independent control of each h-bridge via parallel mcu interfac e (3.0 v- and 5.0 v-compatible logic). the device features built-i n shoot-through current protection and an undervoltage shutdown function. the 17533 has four operating modes: forward, reverse, brake, and tri-stated (high impedance). the 17533 has a low total r ds(on) of 1.2 ? (max @ 25c). the 17533?s low output resistance and high slew rates provide efficient drive for many types of micromotors. features ? low total r ds(on) 0.8 ? (typ), 1.2 ? (max) @ 25c ? output current 0.7 a (dc), 1.4 a (peak) ? shoot-through current protection circuit ?3.0 v/ 5.0 v cmos-compatible inputs ? pwm control input frequency up to 200 khz ? built-in 2-channel h-bridge driver ? low power consumption ? undervoltage detection and shutdown circuit ? pb-free packaging designated by suffix code ev figure 1. 17533 simplified application diagram h-bridge motor driver ev suffix (pb-free) 98asa10614d 16-pin vmfp 17533 ordering information device temperature range (t a ) package mpc17533ev/el -20c to 65c 16 vmfp vdd vg in2b oe in2a in1a out2b out2a out1b out1a vm gnd mcu in1b 5.0 v 13 v 5.0 v 17533 bipolar step motor n s
analog integrated circuit device data 2 freescale semiconductor 17533 internal block diagram internal block diagram figure 2. 17533 simplifi ed internal block diagram vm1 out2b out2a out1a pgnd2 in1a in1b vdd low- shutdown level shifter vm2 out1b in2a in2b oe lgnd pgnd1 control predriver voltage h-bridge 1 h-bridge 2 logic v dd vg
analog integrated circuit device data freescale semiconductor 3 17533 pin connections pin connections figure 3. 17533 pin connections table 1. pin function description pin pin name formal name definition 1 out1a h-bridge output 1a output a of h-bridge channel 1. 2 vm1 motor drive power supply 1 positive power source connection for h- bridge 1 (motor drive power supply). 3 in1a logic input control 1a logic input control of out1a (refer to table 5, truth table , page 7 ). 4 in1b logic input control 1b logic input control of out1b (refer to table 5, truth table , page 7 ). 5 vdd logic supply control circuit power supply pin. 6 oe output enable logic output enable control of h-bridges (low = true). 7 lgnd logic ground low-current logic signal ground. 8 out1b h-bridge output 1b output b of h-bridge channel 1. 9 pgnd1 power ground 1 high-current power ground 1. 10 out2b h-bridge output 2b output b of h-bridge channel 2. 11 vm2 motor drive power supply 2 positive power source connection for h- bridge 2 (motor drive power supply). 12 vg gate driver circuit voltage input input pin for the gate drive voltage. 13 in2b logic input control 2b logic input control of out2b (refer to table 5, truth table , page 7 ). 14 in2a logic input control 2a logic input control of out2a (refer to table 5, truth table , page 7 ). 15 out2a h-bridge output 2a output a of h-bridge channel 2. 16 pgnd2 power ground 2 high-current power ground 2. 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 out2a in2a in2b vg vm2 out2b pgnd1 out1a vm1 in1a in1b vdd oe lgnd out1b pgnd2
analog integrated circuit device data 4 freescale semiconductor 17533 electrical characteristics maximum ratings electrical characteristics maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise noted . exceeding the ratings may cause a malfunction or permanent damage to the device. rating symbol value unit motor supply voltage v m -0.5 to 8.0 v gate driver circuit power supply voltage v g -0.5 to 14 v logic supply voltage v dd -0.5 to 7.0 v signal input voltage v in -0.5 to v dd + 0.5 v driver output current continuous peak (1) i o i o pk 0.7 1.4 a esd voltage (2) human body model machine model v esd1 v esd2 1500 200 v operating junction temperature t j -55 to 150 c operating ambient temperature t a -20 to 65 c storage temperature range t stg -55 to 150 c thermal resistance (3) r ja 150 c/w power dissipation (4) p d 830 mw pin soldering temperature (5) t solder 260 c notes 1. t a = 25 c. 10 ms pulse at 200 ms intervals. 2. esd1 testing is performed in accor dance with the human body model (c zap = 100 pf, r zap = 1500 ? ), esd2 testing is performed in accordance with the machine model (c zap = 200 pf, r zap = 0 ? ). 3. mounted on 37 mm x 50 mm x 1.6 mm glass epoxy board mount. 4. t a = 25 c. 5. pin soldering temperature limit is for 10 seconds maximum duration. not designed fo r immersion soldering. exceeding these lim its may cause malfunction or permanent damage to the device.
analog integrated circuit device data freescale semiconductor 5 17533 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electric al characteristics characteristics noted under conditions t a = 25 c, v dd = v m = 5.0 v, gnd = 0 v unless other wise noted. typical values noted reflect the approximate parameter means at t a = 25 c under nominal conditions unless otherwise noted. characteristic symbol min typ max unit power motor supply voltage v m 2.0 5.0 6.8 v logic supply voltage v dd 2.7 5.0 5.7 v quiescent power supply current driver circuit power supply current logic supply current (6) gate driver circuit power supply current i q m i q vdd i q vg ? ? ? ? ? ? 1.0 20 150 a operating power supply current logic supply current (7) gate driver circuit power supply current (8) i v dd i v g ? ? ? ? 3.0 0.7 ma low v dd detection voltage (9) v dd det 1.5 2.0 2.5 v driver output on resistance source + sink at i o = 0.7 a (10) v g = 9.5 v, v m = 5.0 v, t a = 25 c (11) r ds(on) r ds(on)2 ? ? 0.8 ? 1.2 1.5 ? gate drive gate drive circuit power supply voltage v g 12 13 13.5 v control logic logic input voltage v in 0 ? v dd v logic inputs (2.7 v < v dd < 5.7 v) high-level input voltage low-level input voltage high-level input current low-level input current oe pin input current low v ih v il i ih i il i il - oe v dd x 0.7 ? ? -1.0 ? ? ? ? ? 50 ? v dd x 0.3 1.0 ? 100 v v a a a notes 6. iq vdd includes the current to predriver circuit. 7. i v dd includes the current to predriver circuit at f in = 100 khz. 8. at f in = 20 khz. 9. detection voltage is defined as when the output becomes high-impedance after v dd drops below the detection threshold. when gate voltage v g is applied from an external source, v g = 7.5 v. 10. the total h-bridge on resistance when vg is 13v. 11. increased rds(on) value as the result of a reduced vg value of 9.5 v.
analog integrated circuit device data 6 freescale semiconductor 17533 electrical characteristics dynamic electrical characteristics dynamic electrical characteristics table 4. dynamic electri cal characteristics characteristics noted under conditions t a = 25 c, v dd = v m = 5.0 v, gnd = 0 v unless otherwise noted. characteristic symbol min typ max unit input pulse input frequency f in ? ? 200 khz input pulse rise time (12) t r ? ? 1.0 (13) s input pulse fall time (14) t f ? ? 1.0 (13) s output propagation delay time (15) turn-on time turn-off time t plh t phl ? ? 0.1 0.1 0.5 0.5 s low-voltage detection time (16) t v dd det ? ? 10 ms notes 12. time is defined between 10% and 90%. 13. that is, the input waveform slope must be steeper than this. 14. time is defined between 90% and 10%. 15. load of output is 8.0 ? resistance. see figure 4 16. see figure 5.
analog integrated circuit device data freescale semiconductor 7 17533 electrical characteristics timing diagrams timing diagrams figure 4. t plh , t phl , and t pzh timing figure 5. low-voltage detection timing diagram 10% in1, 50% outa, outb in2, 90% t plh t phl oe t v dd det 0% i m 50% t v dd det v dd deton v dd detoff 90% (<1.0 a) v dd 2.5 v 1.5 v table 5. truth table input output oe in1a in2a in1b in2b out1a out2a out1b out2b l l l l l l h l h l l l h l h l h h z z h x x z z h = high. l = low. z = high impedance. x = don?t care. oe pin is pulled up to v dd with internal resistance.
analog integrated circuit device data 8 freescale semiconductor 17533 functional description introduction functional description introduction the 17533 is a monolithic dual h-bridge ideal for portable electronic applications to control bipolar stepper motors and brush dc motors such as those found in camera len assemblies, camera shutters, optical disk drives, etc. the 17533 operates from 2.0 v to 6.8 v, with independent control of each h-bridge via par allel mcu interface (3.0 v- and 5.0 v-compatible i/o). the device features built-in shoot- through current protection and undervoltage shutdown. the 17533 has four operating modes: forward, reverse, brake, and tri-stated (high impedance). the mosfets comprising the output bridge have a total source + sink r ds(on) 1.2 ? . the 17533 can simultaneously drive two brush dc motors or, as shown in the simplified application diagram on page 1, one bipolar stepper motor. the drivers are designed to be pwm?ed at frequencies up to 200 khz. functional pin description logic supply (vdd) the vdd pin carries the logic supply voltage and current into the logic sections of the ic. vdd has an undervoltage threshold. if the supply volt age drops below the undervoltage threshold, the output power st age switches to a tri-state condition. when the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input control pins. logic input control (in1a, in1b, in2a, and in2b) these logic input pins control each h-bridge output (e.g., in1a logic high = out1a high, etc.). however, if all inputs are taken high, the outputs bri dges are both tri-stated (refer to table 5, truth table , page 7 ). output enable ( oe) the oe pin is a low = true enable input. when oe = high, all h-bridge output s (out1a, out1b, out2a, and out2b) are tri-stated (high-impedance), regardless of logic inputs (in1a, in1b, in2a, and in2b) states. output a and b of h-bridge channel 1 and 2 (out1a, out1b, out2a, and out2b) these pins provide connection to the outputs of each of the internal h-bridges (see figure 2, 17533 simplified internal block diagram , page 2 ). motor drive power supply (vm1 and vm2) the vm pins carry the main supply voltage and current into the power sections of the ic . this supply then becomes controlled and/or modulated by th e ic as it delivers the power to the loads attached between the output pins. all vm pins must be connected together on the printed circuit board. gate driver circuit voltage input (vg) the vg pin is the input pin for the gate drive voltage. power ground (pgnd) power ground pins. they must be tied together on the pcb. logic ground (lgnd) logic ground pin.
analog integrated circuit device data freescale semiconductor 9 17533 typical applications introduction typical applications introduction figure 6 shows a typical application for the 17533. when applying the gate voltage to the vg pin from an external source, be sure to connect it vi a a resistor equal to, or greater than, r g = v g / 0.02 ? . care must be taken to provide sufficient gate-source voltage for the high-side mosfets when v m >> v dd (e.g., v m = 5.0 v, v dd = 3.0 v), in order to ensure full enhancement of the high-side mosfet channels. figure 6. 17533 typical application diagram cemf snubbing techniques care must be taken to protect the ic from potentially damaging cemf spikes induced when commuting currents in inductive loads. typical practice is to provide snubbing of voltage transients by placing a zener or a capacitor at the supply pin (vm) (see figure 7 ). figure 7. cemf snubbing techniques pcb layout when designing the printed circuit board (pcb), connect sufficient capacitance between power supply and ground pins to ensure proper filtering from transients. for all high- current paths, use wide copper traces and shortest possible distances. mcu 17533 5.0 v gnd vg in1b in2a in2b oe vm vdd out1b out2b 0.01 f out1a in1a out2a v g < 14 v r g > v g /0.02 ? r g 17533 5.0 v 5.0 v gnd vm vdd out out out out 17533 5.0 v 5.0 v gnd vm vdd out out out out
analog integrated circuit device data 10 freescale semiconductor 17533 packaging package dimensions packaging package dimensions important: for the most current revisi on of the package, visit www.freescale.com and perform a keyword search on the 98a number listed below. ev (pb-free) suffix 16-lead vmfp plastic package 98asa10614d issue b
analog integrated circuit device data freescale semiconductor 11 17533 revision history revision history revision date description of changes 2.0 5/2006 ? converted to freescale format ? added revision history page 3.0 7/2006 ? updated to the prevailing form and style ? corrected device isometric drawing on page 1 ? added rohs compliance
mpc17533 rev. 3.0 7/2006 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2006. all rights reserved. how to reach us: home page: www.freescale.com e-mail: support@freescale.com usa/europe or locations not listed: freescale semiconductor technical information center, ch370 1300 n. alma school road chandler, arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) support@freescale.com japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com

▲Up To Search▲

Price & Availability of 17533

	To Download 17533 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .